Cadence Tutorial
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Overview
In this module you will simulate your inverter again, this time using the extracted layout. For the sake of time, we will just run a transient analysis. I'll trust that you know how to repeat the DC analysis that we did before. We're going to use a quick and dirty way of simulating our circuit without using a testbench circuit. This is not usually a good practice but is sometimes useful so I'll use this opportunity to show you how. The benefit of a testbench circuit is that you can set the load and see how your device would perform in a realistic situation. Also you are less likely to screw up your cells that way since you don't have to open them up, you just instance them in another schematic.Running the Simulation
As a preliminary step, you should add the analogLib library. Go to Library Manager window, Select Edit->Library Path. Add one row in the Libraries window as following:Type in analogLib in the Library column, then in the Path column, type in /usr/local/cad/cadence/installs/IC610/tools/dfII/etc/cdslib/artist/analogLib. Save the library and clost the library path window.
Open the analog environment directly from the extracted Cell View.
Select Setup->Environment. In the switch view list, add 'extracted' before 'schematic.' The simulator will search in this order and will stop when it encounters the Cell View 'extracted.'
Now select Setup->Stimuli.. and click OK. A similar window will appear:
The first source in the list is 'in.' Clikc the 'enabled' button, set the function to pulse. Set the Voltage 1 and Voltage 2 to 0 and 5 volts as before. Set the pulsewidth and period to 1ns and 2ns as before. You can also set a rise time, fall time and delay time if you wish. Click 'Change' to apply the changes. In the same way, set vdd to be a 5V dc source and vss to be a 0V dc source. Click OK.
Select transient analysis as before. Set the stop time to 10ns.
Select the outputs to be plotted as before.
Run the simulation. You should get this:
