Cadence Tutorial
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Overview
In this module you will create a testbench circuit for your CMOS inverter.Make the Testbench cell
Using the library manager, make a library called EEE5390_Test. This is where you will put the testbench schematics for all your cells. That way you can keep them separate from the cells you will actually use in your design. Its not that important, just a bit of housekeeping. Create a new schematic cellview called inv_test.Placing the Components
Add an instance of your inv cell. You will see the symbol that you drew with the pins and pin names. Now you want to add some voltage sources. In the NCSU Analog Parts library you will find cells called vdc and vpulse. As the name suggests, they are DC voltage sources. Add one vdc and one vpulse to the schematic. Also find a capacitor to serve as a load and add one of those. (IMPORTANT: Make sure the capacitor is 1f and not 1p, or your simulations will not work as expected in the next section.) Finally, instance a gnd symbol from the same library. Wire it up like this:
Click on the voltage supply that connects the vdd and vss. Click the 'Edit Properties' button on the toolbar (or press 'q' on the keyboard) and set the DC voltage to 5 volts. Set the properties of vpulse with V1 = 0V and V2 = 5V.
Check and Save your circuit.