Cadence Tutorial
Part 1 | Part 2 | Part 3 | Part 4 | Part 5 | Part 6 | Part 7 | Part 8 | Part 9
1. Running Cadence
Open a new terminal window. Switch to the c-shell, go to your working directory and run IC 5.1.41 by typing:cd cdscad6
virtuoso&
the "&" lets you keep using the terminal to perform other tasks while ifcb is still running.
2. Tour
Now that Cadence has finished loading you should see three windows. The smallest of these says
'Done loading NCSU_CDK customizations.'
indicating that the design kit is properly installed. This window is
called the CIW. It is the main control window for Cadence. You can type
commands in the command line or use the mouse to select commands from
the toolbar.
You may get a second window says
"what's new in 6.10"
Close this window.
The last window that is currently open is the Library Manager. The
library manager allows you to navigate through the hierarchy of items
that you will create as you use cadence. These items will include
libraries, cells, and cellviews. Now is probably a good time to discuss
hierarchical design.
Hierarchical design is what makes CAD so powerful. You can design small
parts called cells and easily reuse those parts many times to create a
larger object. Then you can reuse this larger object as a cell in an
even larger object and so on. A properly designed hierarchy will save
you tons of time, it will be easy to understand, and easy to modify if
needed.
There are many ways to organize a hierarchy and you can decide what works for you, but the most logical to me is to make each physical object in the design a cell, thus a transistor is a cell. Multiple transistors will be used to make gate cells. Multiple gates will make circuit cells, like adders or multipliers. These will ultimately be combined to make a core cell (all the guts of your chip) and this will be plugged into the pad-frame cell to make your final layout.
Well
designed cells will plug together nicely without a lot of modification.
Basically if you ever have to draw the same thing twice, it should have
been a cell.
3. Creating a New Library
Create a new library by selecting File->New->Library from the library manager window. Name your new library 'EEE5390'.
A pop up will ask you the technology file for the library.
Select "Attach to an existing techfile" and click OK. Select the proper techfile from the drop-down menu and click OK. In our case this is "NCSU_Techlib_AMI06".
This will set up the layers you draw to correspond with the various
fabrication steps that the foundry uses to make your chip. It will also
tell the program what models to use when simulating your circuits.